A long Mill Computing lecture on the Mill CPU's compiler toolchain, covering the specializer that targets family members, scheduling and latency passes, and the belt. It explains how the compiler handles a wide-issue, exposed-pipeline design.
Why Hacker News points people here: Cited as the authoritative source on how Mill's VLIW-style compiler specializes code and differs from Itanium.
“have a design talk that covers these concepts wonderfully in the general form”HN comment, 2023
“have a design talk that covers these concepts wonderfully in the general form”
Shows how the Mill VLIW compiler specialises code for different hardware variants.
Full comment
The (disconcertingly silent) Mill CPU company have a design talk that covers these concepts wonderfully in the general form, while explaining their various innovations. e.g. this video describes how their VLIW compiler does partial compilation/'specialisation' to allow the same input to be consumed on machines with different variations of hardware features. this video
Cites itflaJul 2015
“about the belt being in fact a 'proxy' of the bypass network is very interesting”
Explains the Mill belt as a proxy for the bypass network.
Full comment
The answer at 1:26:12 [1] about the belt being in fact a 'proxy' of the bypass network is very interesting. [1] this video
Cites itmagicalhippoFeb 2019
“here's[1] the relevant one on the compiler aspect”
Covers the Mill compiler aspects and how it differs from Itanium.
Full comment
It's been too long since I watched the videos, so unfortunately I don't remember the specifics. For reference, here's[1] the relevant one on the compiler aspect. I do seem to recall that they seemingly had studied the failures of Itanium, and supposedly designed their architecture to not fall into the same pitfalls as with the EPIC/Itanium. One aspect I recall is that while they have VLIW, different operations within the (compound) instruction are issued in such a way that lets them be interdependent. Like, a single VLIW instruction could have an add and a multiply, where the result of the add is used as input for the multiplication. So while the operations are grouped in a single instruction, they're not executed strictly in parallel. There's a lot of other aspects too, that's just the one I remember. But yeah, really curious to know how that pudding will turn out. [1]: this video